SPIE MICROELECTRONIC & OPTOELECTRONIC DEVICES
- Lithography Process Control
- Process Integration and Device
Characterization in Microelectronic Manufacturing
Lithography Process Control
Instructor: Harry J. Levinson is a
Senior Member of the Technical Staff at Advanced Micro Devices,
where he is the project leader for DUV lithography development.
Process control, the essential technology for
manufacturing products economically, is presented in the specific
context of optical lithography as applied to microelectronics and
related technologies. The emphasis for this class will be on
relevant lithography science and statistical considerations. Much
of the material for this class was developed by the instructor
and is not available elsewhere.
This course will enable the attendee to:
- Correctly apply statistical process
control, even in those situations, unique to the
microelectronics industry, where the application of
statistical process control is not straightforward.
- Distinguish those circumstances where
statistical process control cannot by applied
straightforwardly from those where it can.
- Separate equipment issues from other
process factors
- Control linewidths, overlay and defects.
- Choose a proper sample size.
- Address situations in which parameter
distributions, such as overlay, are non-normal.
- Apply process control methods to research
and development as well as manufacturing.
Part I: Overview of Statistical Process Control
- List underlying assumptions
- Describe properties of statistical process
control
- Show situations in lithography where
statistical process control cannot be applied naively
- Describe tests of normality
Part II: Process Capability and Sampling
- Describe process capability, including
capability indices and Taguchi's contributions to quality
control
- Explain sampling, including choosing a
proper sample size, measurement location considerations,
and acceptance sampling
Part III: Simple and Complex Processes and
Linewidth Control
- Describe simple and complex processes,
including definitions and Deming's funnel experiment
- Explain how complex processes arise in
lithography
- Explain linewidth control, including
independent variables, cause-and- effect, maximizing the
process window
Part IV: Discussion of Overlay and Yield
- Describe overlay models
- Use model parameters to control the
process
- Address the problem of non-normal
distributions
- Explain yield, including types of
monitors, methodology for controlling, and models
Part V: Automatic Process Control, Metrology,
and Control of Operations
- Describe automatic process control,
including its relationship to process control and the
development of end-point detection
- Explain metrology issues related to
process control
- Explain the measurement process: defect
detection
- Define control of operations, including
documentation and ISO 9000
Intended Audience: Engineers,
technicians, and managers who need to improve the level of
process control in their lithography operation, i.e. reduce
variation, and increase productivity and yield. Some knowledge of
basic statistics and statistical process control is assumed.
Order Number: VT051596
Length: 5 hours
Individual Price: List US$395
Site License: List US$1,000
Process Integration and Device Characterization
in Microelectronic Manufacturing
Instructor: Badih El-Kareh is a Senior
Scientist at IBM, Hopewell Junction, New York, working in process
integration, 256 Mbit DRAM project.
A discussion of submicron manufacturing
technologies, integration problems, and device characterization
will be provided in this course. Technology trends and issues
will be presented, with a focus on CMOS processes and their
characterization. Techniques to extract MOSFET parameters and
relate them to processes will be described.
This course will enable you to:
- Describe CMOS processes and technology
trends
- Understand material and device
characterization techniques
- Extract key MOSFET parameters from
electrical measurements
- Relate electrical parameters to the
vertical and horizontal device geometries and material
properties.
- Summarize technology issues and trends in
memory and logic
Part I: Introduction, Trends
- Define key MOSFET and Bipolar parameters
- Describe basic CMOS elements
- Summarize future trends in memory and
logic
Part II: Wafer and Insulators, Preparation and
Characterization
- Describe wafer preparation, properties,
and impact on devices
- Identify issues in thermally grown
insulators and how they affect device parameters
- Describe techniques to characterize wafers
and insulators
Part III: Issues in Lithography, Etch, and Ion
Implantation
- Identify issues and impact on device
parameters
- Understand importance of contamination
control and quantify impact on yield
- Explain plasma and ion-implantation
charging damage
- Describe methods to characterize implanted
regions
- Design test structures and describe
methods to detect defects and measure damage.
Part IV: Contact and Interconnects and Process
Integration
- Describe contact and interconnect
technologies
- Describe planarization techniques
- Define a dynamic random-access memory
process and key elements of the cell structure
- Define the key elements in logic
Part V: MOSFET Characterization and Parameter
Extraction
- Understand techniques to measure contact
and sheet resistances
- Extract parameters from gate-controlled
junction measurements
- Extract parameters from MOSFET
measurements
- Relate electrical parameters to process
- Identify solution to latch-up and
electro-static discharge
Intended Audience: Engineers in
semiconductor manufacturing and development, who need a deeper
insight into CMOS and BiCMOS processing integration, device
characterization techniques, parameter extraction, and relation
between device and process parameters.
Order Number: VT052396
Length: 5 hours
Individual Price: List US$395
Site License: List US$1,000
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